Search - testbench vhdl

[Crack Hack] rom_des.zip

Description: DES 加密算法的VHDL和VERILOG 源程序及其TESTBENCH。
Platform: | Size: 30494 | Author: | Hits:

Description: 波形发生器，带TESTBENCH，多平台 -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn -waveform generator, with TESTBENCH. Multi-platform -- the design makes use of the new shift opera tors available in the VHDL-93 std -- this design passes the Synplify synthesis check -- downloa d from : www.fpga.com.cn
Platform: | Size: 1184 | Author: 罗兰 | Hits:

[Other resource] mdct.tar

Description: 这是06年4月刚刚完成的程序，从opencore.org下载而来。用vhdl语言描写，以及matlab仿真，testbench，以及在xinlinx上的综合。 The MDCT core is two dimensional discrete cosine transform implementation designed for use in compression systems like JPEG. Architecture is based on parallel distributed arithmetic with butterfly computation. -This is April 06 had just completed the process, from opencore.org downloaded from. Vhdl description language used, and Matlab simulation, testbench, and the Comprehensive xinlinx. The MDCT core is two dimensional discrete cosin e transform implementation designed for use in JPEG compression systems like. Architecture i 's based on parallel distributed arithmetic wit h butterfly computation.
Platform: | Size: 1767014 | Author: 陈朋 | Hits:

[Other resource] simplevhdl

Description: 我是VHDL的初学者，这是我自己编译的简单的几个VHDL码，功能有3-8解码器及其testbench,16位寄存器及其testbench和交通灯。希望能和其他初学者一起讨论学习，并得到高手的指点-I VHDL beginners, this is my own translation of a few simple VHDL code. 3 -8 function decoder and testbench, 16 Register and testbench and traffic lights. Hopes to be able to discuss other beginners learning, and with the guidance of the master
Platform: | Size: 4034 | Author: yvonne | Hits:

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[Crack Hack] rom_des.zip

[Other resource] wave_gen

[Other resource] mdct.tar

[Other resource] simplevhdl

[Other resource] ModelSim_TestBench_VHDL

[Develop Tools] VHDL_TESTBENCH

[Other resource] RISCMCU

[Other resource] core_arm.tar

[Other resource] counter

[Other resource] color_converter.tar

[Other resource] spi_boot-rel_3_2_rev_C.tar

[Other resource] ArtofWritingTestBenches

[Other resource] rom

[Other resource] PWM

[Other resource] textio

[Other resource] flash接口控制_verilog

[VHDL-FPGA-Verilog] Vhdl-code-a-testbench

[VHDL-FPGA-Verilog] cy7c443

[Software Engineering] vhdl_testbench_tutorial

[VHDL-FPGA-Verilog] dct_parallel.tar

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